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[AMDGPU][True16] Add regbank combiner cases to fix regression around G_SEXTLOAD#198671

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[AMDGPU][True16] Add regbank combiner cases to fix regression around G_SEXTLOAD#198671
saxlungs wants to merge 2 commits into
users/saxlungs/true16-gisel-16bit-extloadsfrom
users/saxlungs/true16-gisel-16bit-extloads-combiner

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@saxlungs saxlungs commented May 19, 2026 •
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See #195289 for previous discussion

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@saxlungs saxlungs marked this pull request as ready for review May 19, 2026 22:39
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llvmorg-github-actions Bot commented May 19, 2026

@llvm/pr-subscribers-llvm-globalisel

Author: Domenic Nutile (saxlungs)

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See #195289 for previous discussion

Full diff: https://github.com/llvm/llvm-project/pull/198671.diff

2 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp (+17-2)
  • (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir (+42-132)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
index 990d879c2bf09..540730162e0cb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
@@ -420,7 +420,8 @@ bool AMDGPURegBankCombinerImpl::combineD16Load(MachineInstr &MI) const {
 
     if (mi_match(
             Load, MRI,
-            m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16))))) {
+            m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16)))) ||
+        mi_match(Load, MRI, m_GZExt(m_MInstr(SextLoad)))) {
       if (SextLoad->getOpcode() != AMDGPU::G_SEXTLOAD)
         return false;
 
@@ -428,6 +429,12 @@ bool AMDGPURegBankCombinerImpl::combineD16Load(MachineInstr &MI) const {
       if (MMO->getSizeInBits().getValue() != 8)
         return false;
 
+      if (Load->getOpcode() == TargetOpcode::G_ZEXT) {
+        LLT SextDstTy = MRI.getType(SextLoad->getOperand(0).getReg());
+        if (SextDstTy.getSizeInBits() != 16)
+          return false;
+      }
+
       return applyD16Load(AMDGPU::G_AMDGPU_LOAD_D16_LO_I8, MI, SextLoad, Dst);
     }
 
@@ -452,13 +459,21 @@ bool AMDGPURegBankCombinerImpl::combineD16Load(MachineInstr &MI) const {
 
     if (mi_match(
             Load, MRI,
-            m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16))))) {
+            m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16)))) ||
+        mi_match(Load, MRI, m_GZExt(m_MInstr(SextLoad)))) {
       if (SextLoad->getOpcode() != AMDGPU::G_SEXTLOAD)
         return false;
+
       const MachineMemOperand *MMO = *SextLoad->memoperands_begin();
       if (MMO->getSizeInBits().getValue() != 8)
         return false;
 
+      if (Load->getOpcode() == TargetOpcode::G_ZEXT) {
+        LLT SextDstTy = MRI.getType(SextLoad->getOperand(0).getReg());
+        if (SextDstTy.getSizeInBits() != 16)
+          return false;
+      }
+
       return applyD16Load(AMDGPU::G_AMDGPU_LOAD_D16_HI_I8, MI, SextLoad, Dst);
     }
 
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir
index 7f8c1451b8019..4f328472d55b2 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir
@@ -81,51 +81,21 @@ body: |
     ; GFX12-FAKE16-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
     ; GFX12-FAKE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
     ;
-    ; GFX11-TO-COMBINER-TRUE16-LABEL: name: test_sextload_global_s16_from_s8
-    ; GFX11-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 1)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
-    ;
-    ; GFX11-TO-COMBINER-FAKE16-LABEL: name: test_sextload_global_s16_from_s8
-    ; GFX11-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 1)
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
-    ;
-    ; GFX12-TO-COMBINER-TRUE16-LABEL: name: test_sextload_global_s16_from_s8
-    ; GFX12-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 1)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
+    ; GFX11-TO-COMBINER-LABEL: name: test_sextload_global_s16_from_s8
+    ; GFX11-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: {{  $}}
+    ; GFX11-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX11-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 1)
+    ; GFX11-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     ;
-    ; GFX12-TO-COMBINER-FAKE16-LABEL: name: test_sextload_global_s16_from_s8
-    ; GFX12-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 1)
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
+    ; GFX12-TO-COMBINER-LABEL: name: test_sextload_global_s16_from_s8
+    ; GFX12-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: {{  $}}
+    ; GFX12-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX12-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 1)
+    ; GFX12-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     %0:_(p1) = COPY $vgpr0_vgpr1
     %1:_(<2 x s16>) = COPY $vgpr2
     %2:_(s16) = G_SEXTLOAD %0 :: (load (s8), addrspace 1)
@@ -206,51 +176,21 @@ body: |
     ; GFX12-FAKE16-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
     ; GFX12-FAKE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
     ;
-    ; GFX11-TO-COMBINER-TRUE16-LABEL: name: test_sextload_local_s16_from_s8
-    ; GFX11-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 3)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
-    ;
-    ; GFX11-TO-COMBINER-FAKE16-LABEL: name: test_sextload_local_s16_from_s8
-    ; GFX11-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 3)
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
-    ;
-    ; GFX12-TO-COMBINER-TRUE16-LABEL: name: test_sextload_local_s16_from_s8
-    ; GFX12-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 3)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
+    ; GFX11-TO-COMBINER-LABEL: name: test_sextload_local_s16_from_s8
+    ; GFX11-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: {{  $}}
+    ; GFX11-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX11-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 3)
+    ; GFX11-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     ;
-    ; GFX12-TO-COMBINER-FAKE16-LABEL: name: test_sextload_local_s16_from_s8
-    ; GFX12-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 3)
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
+    ; GFX12-TO-COMBINER-LABEL: name: test_sextload_local_s16_from_s8
+    ; GFX12-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: {{  $}}
+    ; GFX12-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX12-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 3)
+    ; GFX12-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     %0:_(p1) = COPY $vgpr0_vgpr1
     %1:_(<2 x s16>) = COPY $vgpr2
     %2:_(s16) = G_SEXTLOAD %0 :: (load (s8), addrspace 3)
@@ -331,51 +271,21 @@ body: |
     ; GFX12-FAKE16-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
     ; GFX12-FAKE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
     ;
-    ; GFX11-TO-COMBINER-TRUE16-LABEL: name: test_sextload_private_s16_from_s8
-    ; GFX11-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 5)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
-    ;
-    ; GFX11-TO-COMBINER-FAKE16-LABEL: name: test_sextload_private_s16_from_s8
-    ; GFX11-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 5)
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
-    ;
-    ; GFX12-TO-COMBINER-TRUE16-LABEL: name: test_sextload_private_s16_from_s8
-    ; GFX12-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 5)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
+    ; GFX11-TO-COMBINER-LABEL: name: test_sextload_private_s16_from_s8
+    ; GFX11-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: {{  $}}
+    ; GFX11-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX11-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 5)
+    ; GFX11-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     ;
-    ; GFX12-TO-COMBINER-FAKE16-LABEL: name: test_sextload_private_s16_from_s8
-    ; GFX12-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 5)
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
+    ; GFX12-TO-COMBINER-LABEL: name: test_sextload_private_s16_from_s8
+    ; GFX12-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: {{  $}}
+    ; GFX12-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX12-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 5)
+    ; GFX12-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     %0:_(p1) = COPY $vgpr0_vgpr1
     %1:_(<2 x s16>) = COPY $vgpr2
     %2:_(s16) = G_SEXTLOAD %0 :: (load (s8), addrspace 5)

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llvmorg-github-actions Bot commented May 19, 2026

@llvm/pr-subscribers-backend-amdgpu

Author: Domenic Nutile (saxlungs)

Changes

<sub>Stack created with <a href="https://github.com/github/gh-stack"&gt;GitHub Stacks CLI</a> • <a href="https://gh.io/stacks-feedback"&gt;Give Feedback 💬</a></sub>

See #195289 for previous discussion

Full diff: https://github.com/llvm/llvm-project/pull/198671.diff

2 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp (+17-2)
  • (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir (+42-132)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
index 990d879c2bf09..540730162e0cb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
@@ -420,7 +420,8 @@ bool AMDGPURegBankCombinerImpl::combineD16Load(MachineInstr &MI) const {
 
     if (mi_match(
             Load, MRI,
-            m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16))))) {
+            m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16)))) ||
+        mi_match(Load, MRI, m_GZExt(m_MInstr(SextLoad)))) {
       if (SextLoad->getOpcode() != AMDGPU::G_SEXTLOAD)
         return false;
 
@@ -428,6 +429,12 @@ bool AMDGPURegBankCombinerImpl::combineD16Load(MachineInstr &MI) const {
       if (MMO->getSizeInBits().getValue() != 8)
         return false;
 
+      if (Load->getOpcode() == TargetOpcode::G_ZEXT) {
+        LLT SextDstTy = MRI.getType(SextLoad->getOperand(0).getReg());
+        if (SextDstTy.getSizeInBits() != 16)
+          return false;
+      }
+
       return applyD16Load(AMDGPU::G_AMDGPU_LOAD_D16_LO_I8, MI, SextLoad, Dst);
     }
 
@@ -452,13 +459,21 @@ bool AMDGPURegBankCombinerImpl::combineD16Load(MachineInstr &MI) const {
 
     if (mi_match(
             Load, MRI,
-            m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16))))) {
+            m_GAnd(m_MInstr(SextLoad), m_Copy(m_SpecificICst(CleanHi16)))) ||
+        mi_match(Load, MRI, m_GZExt(m_MInstr(SextLoad)))) {
       if (SextLoad->getOpcode() != AMDGPU::G_SEXTLOAD)
         return false;
+
       const MachineMemOperand *MMO = *SextLoad->memoperands_begin();
       if (MMO->getSizeInBits().getValue() != 8)
         return false;
 
+      if (Load->getOpcode() == TargetOpcode::G_ZEXT) {
+        LLT SextDstTy = MRI.getType(SextLoad->getOperand(0).getReg());
+        if (SextDstTy.getSizeInBits() != 16)
+          return false;
+      }
+
       return applyD16Load(AMDGPU::G_AMDGPU_LOAD_D16_HI_I8, MI, SextLoad, Dst);
     }
 
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir
index 7f8c1451b8019..4f328472d55b2 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir
@@ -81,51 +81,21 @@ body: |
     ; GFX12-FAKE16-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
     ; GFX12-FAKE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
     ;
-    ; GFX11-TO-COMBINER-TRUE16-LABEL: name: test_sextload_global_s16_from_s8
-    ; GFX11-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 1)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
-    ;
-    ; GFX11-TO-COMBINER-FAKE16-LABEL: name: test_sextload_global_s16_from_s8
-    ; GFX11-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 1)
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
-    ;
-    ; GFX12-TO-COMBINER-TRUE16-LABEL: name: test_sextload_global_s16_from_s8
-    ; GFX12-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 1)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
+    ; GFX11-TO-COMBINER-LABEL: name: test_sextload_global_s16_from_s8
+    ; GFX11-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: {{  $}}
+    ; GFX11-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX11-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 1)
+    ; GFX11-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     ;
-    ; GFX12-TO-COMBINER-FAKE16-LABEL: name: test_sextload_global_s16_from_s8
-    ; GFX12-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 1)
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
+    ; GFX12-TO-COMBINER-LABEL: name: test_sextload_global_s16_from_s8
+    ; GFX12-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: {{  $}}
+    ; GFX12-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX12-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 1)
+    ; GFX12-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     %0:_(p1) = COPY $vgpr0_vgpr1
     %1:_(<2 x s16>) = COPY $vgpr2
     %2:_(s16) = G_SEXTLOAD %0 :: (load (s8), addrspace 1)
@@ -206,51 +176,21 @@ body: |
     ; GFX12-FAKE16-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
     ; GFX12-FAKE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
     ;
-    ; GFX11-TO-COMBINER-TRUE16-LABEL: name: test_sextload_local_s16_from_s8
-    ; GFX11-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 3)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
-    ;
-    ; GFX11-TO-COMBINER-FAKE16-LABEL: name: test_sextload_local_s16_from_s8
-    ; GFX11-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 3)
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
-    ;
-    ; GFX12-TO-COMBINER-TRUE16-LABEL: name: test_sextload_local_s16_from_s8
-    ; GFX12-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 3)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
+    ; GFX11-TO-COMBINER-LABEL: name: test_sextload_local_s16_from_s8
+    ; GFX11-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: {{  $}}
+    ; GFX11-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX11-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 3)
+    ; GFX11-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     ;
-    ; GFX12-TO-COMBINER-FAKE16-LABEL: name: test_sextload_local_s16_from_s8
-    ; GFX12-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 3)
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
+    ; GFX12-TO-COMBINER-LABEL: name: test_sextload_local_s16_from_s8
+    ; GFX12-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: {{  $}}
+    ; GFX12-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX12-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 3)
+    ; GFX12-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     %0:_(p1) = COPY $vgpr0_vgpr1
     %1:_(<2 x s16>) = COPY $vgpr2
     %2:_(s16) = G_SEXTLOAD %0 :: (load (s8), addrspace 3)
@@ -331,51 +271,21 @@ body: |
     ; GFX12-FAKE16-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
     ; GFX12-FAKE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
     ;
-    ; GFX11-TO-COMBINER-TRUE16-LABEL: name: test_sextload_private_s16_from_s8
-    ; GFX11-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 5)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX11-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
-    ;
-    ; GFX11-TO-COMBINER-FAKE16-LABEL: name: test_sextload_private_s16_from_s8
-    ; GFX11-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 5)
-    ; GFX11-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
-    ;
-    ; GFX12-TO-COMBINER-TRUE16-LABEL: name: test_sextload_private_s16_from_s8
-    ; GFX12-TO-COMBINER-TRUE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[SEXTLOAD:%[0-9]+]]:vgpr(s16) = G_SEXTLOAD [[COPY]](p1) :: (load (s8), addrspace 5)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY1]](<2 x s16>)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[ZEXT:%[0-9]+]]:vgpr(s32) = G_ZEXT [[SEXTLOAD]](s16)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 -65536
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[AND:%[0-9]+]]:vgpr(s32) = G_AND [[BITCAST]], [[COPY2]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[OR:%[0-9]+]]:vgpr(s32) = G_OR [[AND]], [[ZEXT]]
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: [[BITCAST1:%[0-9]+]]:vgpr(<2 x s16>) = G_BITCAST [[OR]](s32)
-    ; GFX12-TO-COMBINER-TRUE16-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
+    ; GFX11-TO-COMBINER-LABEL: name: test_sextload_private_s16_from_s8
+    ; GFX11-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: {{  $}}
+    ; GFX11-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX11-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX11-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 5)
+    ; GFX11-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     ;
-    ; GFX12-TO-COMBINER-FAKE16-LABEL: name: test_sextload_private_s16_from_s8
-    ; GFX12-TO-COMBINER-FAKE16: liveins: $vgpr0_vgpr1, $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: {{  $}}
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 5)
-    ; GFX12-TO-COMBINER-FAKE16-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
+    ; GFX12-TO-COMBINER-LABEL: name: test_sextload_private_s16_from_s8
+    ; GFX12-TO-COMBINER: liveins: $vgpr0_vgpr1, $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: {{  $}}
+    ; GFX12-TO-COMBINER-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
+    ; GFX12-TO-COMBINER-NEXT: [[COPY1:%[0-9]+]]:vgpr(<2 x s16>) = COPY $vgpr2
+    ; GFX12-TO-COMBINER-NEXT: [[AMDGPU_LOAD_D16_LO_I8_:%[0-9]+]]:vgpr(<2 x s16>) = G_AMDGPU_LOAD_D16_LO_I8 [[COPY]](p1), [[COPY1]] :: (load (s8), addrspace 5)
+    ; GFX12-TO-COMBINER-NEXT: $vgpr0 = COPY [[AMDGPU_LOAD_D16_LO_I8_]](<2 x s16>)
     %0:_(p1) = COPY $vgpr0_vgpr1
     %1:_(<2 x s16>) = COPY $vgpr2
     %2:_(s16) = G_SEXTLOAD %0 :: (load (s8), addrspace 5)

@saxlungs saxlungs requested a review from petar-avramovic May 19, 2026 22:39
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🐧 Linux x64 Test Results

  • 170255 tests passed
  • 3156 tests skipped

All executed tests passed, but another part of the build failed. Click on a failure below to see the details.

bin/tco (Likely Already Failing) This test is already failing at the base commit. 
FAILED: bin/tco
: && /opt/llvm/bin/clang++ -gmlt -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror -Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wc++98-compat-extra-semi -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -Wno-pass-failed -Wmisleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -Wno-deprecated-copy -Wno-string-conversion -Wno-ctad-maybe-unsupported -Wno-unused-command-line-argument -Wstring-conversion           -Wcovered-switch-default -Wno-nested-anon-types -O3 -DNDEBUG -no-pie -fuse-ld=lld -Wl,--color-diagnostics    -Wl,--gc-sections tools/flang/tools/tco/CMakeFiles/tco.dir/tco.cpp.o -o bin/tco  -Wl,-rpath,"\$ORIGIN/../lib:"  lib/libLLVMPasses.a  lib/libCUFAttrs.a  lib/libCUFDialect.a  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lib/libMLIRSparseTensorTransforms.a  lib/libMLIRLinalgTransforms.a  lib/libMLIRShardTransforms.a  lib/libMLIRSparseTensorUtils.a  lib/libMLIRSPIRVModuleCombiner.a  lib/libMLIRSPIRVTransforms.a  lib/libMLIRSPIRVConversion.a  lib/libMLIRSPIRVUtils.a  lib/libMLIRTensorInferTypeOpInterfaceImpl.a  lib/libMLIRTensorTilingInterfaceImpl.a  lib/libMLIRLinalgUtils.a  lib/libMLIRTensorTransformOps.a  lib/libMLIRTosaShardingInterfaceImpl.a  lib/libMLIRTosaTransforms.a  lib/libMLIRFuncTransformOps.a  lib/libMLIRFuncUtils.a  lib/libMLIRFuncToLLVM.a  lib/libMLIRArithToLLVM.a  lib/libMLIRControlFlowToLLVM.a  lib/libMLIRTransformDebugExtension.a  lib/libMLIRTransformDialectIRDLExtension.a  lib/libMLIRIRDL.a  lib/libMLIRTransformLoopExtension.a  lib/libMLIRTransformPDLExtension.a  lib/libMLIRTransformSMTExtension.a  lib/libMLIRSMT.a  lib/libMLIRTransformDialectTransforms.a  lib/libMLIRTransformTuneExtension.a  lib/libMLIRVectorTransformOps.a  lib/libMLIRVectorToLLVM.a  lib/libMLIRArithAttrToLLVMConversion.a  lib/libMLIRVectorToSCF.a  lib/libMLIRWasmSSADialect.a  lib/libMLIRX86TransformOps.a  lib/libMLIRX86Transforms.a  lib/libMLIRX86Utils.a  lib/libMLIRXeGPUTransformOps.a  lib/libMLIRTransformDialect.a  lib/libMLIRTransformDialectInterfaces.a  lib/libMLIRTransformDialectUtils.a  lib/libMLIRSPIRVTarget.a  lib/libMLIRSPIRVSerialization.a  lib/libMLIRSPIRVDialect.a  lib/libMLIRSPIRVImageInterfaces.a  lib/libMLIRSPIRVBinaryUtils.a  lib/libMLIRTargetLLVMIRTransforms.a  lib/libMLIRTargetLLVMIRImport.a  lib/libLLVMAArch64AsmParser.a  lib/libLLVMARMAsmParser.a  lib/libLLVMAVRAsmParser.a  lib/libLLVMBPFAsmParser.a  lib/libLLVMLoongArchAsmParser.a  lib/libLLVMMipsAsmParser.a  lib/libLLVMMSP430AsmParser.a  lib/libLLVMPowerPCAsmParser.a  lib/libLLVMRISCVAsmParser.a  lib/libLLVMSparcAsmParser.a  lib/libLLVMSystemZAsmParser.a  lib/libLLVMVEAsmParser.a  lib/libLLVMWebAssemblyAsmParser.a  lib/libLLVMX86AsmParser.a  lib/libLLVMAArch64CodeGen.a  lib/libLLVMARMCodeGen.a  lib/libLLVMAVRCodeGen.a  lib/libLLVMBPFCodeGen.a  lib/libLLVMHexagonCodeGen.a  lib/libLLVMHexagonAsmParser.a  lib/libLLVMLanaiCodeGen.a  lib/libLLVMLanaiAsmParser.a  lib/libLLVMLoongArchCodeGen.a  lib/libLLVMMipsCodeGen.a  lib/libLLVMMSP430CodeGen.a  lib/libLLVMPowerPCCodeGen.a  lib/libLLVMRISCVCodeGen.a  lib/libLLVMSparcCodeGen.a  lib/libLLVMSystemZCodeGen.a  lib/libLLVMVECodeGen.a  lib/libLLVMWebAssemblyCodeGen.a  lib/libLLVMWebAssemblyUtils.a  lib/libLLVMX86CodeGen.a  lib/libLLVMXCoreCodeGen.a  lib/libLLVMAArch64Desc.a  lib/libLLVMAArch64Utils.a  lib/libLLVMARMDesc.a  lib/libLLVMARMUtils.a  lib/libLLVMAVRDesc.a  lib/libLLVMBPFDesc.a  lib/libLLVMHexagonDesc.a  lib/libLLVMLanaiDesc.a  lib/libLLVMLoongArchDesc.a  lib/libLLVMMipsDesc.a  lib/libLLVMMSP430Desc.a  lib/libLLVMPowerPCDesc.a  lib/libLLVMRISCVDesc.a  lib/libLLVMSparcDesc.a  lib/libLLVMSystemZDesc.a  lib/libLLVMVEDesc.a  lib/libLLVMWebAssemblyDesc.a  lib/libLLVMX86Desc.a  lib/libLLVMMCDisassembler.a  lib/libLLVMXCoreDesc.a  lib/libLLVMAArch64Info.a  lib/libLLVMARMInfo.a  lib/libLLVMAVRInfo.a  lib/libLLVMBPFInfo.a  lib/libLLVMHexagonInfo.a  lib/libLLVMLanaiInfo.a  lib/libLLVMLoongArchInfo.a  lib/libLLVMMipsInfo.a  lib/libLLVMMSP430Info.a  lib/libLLVMPowerPCInfo.a  lib/libLLVMRISCVInfo.a  lib/libLLVMSparcInfo.a  lib/libLLVMSystemZInfo.a  lib/libLLVMVEInfo.a  lib/libLLVMWebAssemblyInfo.a  lib/libLLVMX86Info.a  lib/libLLVMXCoreInfo.a  lib/libMLIRNVVMTarget.a  lib/libLLVMNVPTXCodeGen.a  lib/libLLVMNVPTXDesc.a  lib/libLLVMNVPTXInfo.a  lib/libMLIRNVVMToLLVMIRTranslation.a  lib/libMLIRROCDLTarget.a  lib/libLLVMAMDGPUAsmParser.a  lib/libLLVMAMDGPUCodeGen.a  lib/libLLVMMIRParser.a  lib/libLLVMAMDGPUDesc.a  lib/libLLVMAMDGPUUtils.a  lib/libLLVMAMDGPUInfo.a  lib/libMLIRROCDLToLLVMIRTranslation.a  lib/libMLIRROCDLDialect.a  lib/libMLIRXeVMTarget.a  lib/libLLVMSPIRVCodeGen.a  lib/libLLVMSPIRVAnalysis.a  lib/libLLVMSPIRVDesc.a  lib/libLLVMSPIRVInfo.a  lib/libMLIRTargetLLVM.a  lib/libMLIRExecutionEngineUtils.a  lib/libLLVMPasses.a  lib/libLLVMCFGuard.a  lib/libLLVMGlobalISel.a  lib/libLLVMSelectionDAG.a  lib/libLLVMHipStdPar.a  lib/libLLVMIRPrinter.a  lib/libLLVMCoroutines.a  lib/libLLVMipo.a  lib/libLLVMInstrumentation.a  lib/libLLVMVectorize.a  lib/libLLVMSandboxIR.a  lib/libLLVMLinker.a  lib/libMLIRXeVMToLLVMIRTranslation.a  lib/libMLIRTargetLLVMIRExport.a  lib/libMLIRLLVMIRTransforms.a  lib/libMLIRTranslateLib.a  lib/libLLVMFrontendOpenMP.a  lib/libLLVMFrontendOffloading.a  lib/libLLVMObjectYAML.a  lib/libLLVMFrontendAtomic.a  lib/libLLVMFrontendDirective.a  lib/libMLIRTestDynDialect.a  lib/libMLIRTosaTestPasses.a  lib/libMLIRTosaDialect.a  lib/libMLIRQuantUtils.a  lib/libMLIRQuantDialect.a  lib/libMLIRXeGPUTestPasses.a  lib/libMLIRXeGPUTransforms.a  lib/libMLIRVectorTransforms.a  lib/libMLIRGPUUtils.a  lib/libMLIRMemRefTransforms.a  lib/libMLIRArithTransforms.a  lib/libMLIRFuncTransforms.a  lib/libMLIRShardingInterface.a  lib/libMLIRShardDialect.a  lib/libMLIRNVGPUDialect.a  lib/libMLIRNVVMDialect.a  lib/libMLIRXeGPUUtils.a  lib/libMLIRSCFTransforms.a  lib/libMLIRBufferizationTransforms.a  lib/libMLIRTensorTransforms.a  lib/libMLIRAffineTransforms.a  lib/libMLIRMemRefUtils.a  lib/libMLIRLinalgDialect.a  lib/libMLIRBufferizationDialect.a  lib/libMLIRSparseTensorDialect.a  lib/libMLIRParser.a  lib/libMLIRBytecodeReader.a  lib/libMLIRTensorUtils.a  lib/libMLIRVectorUtils.a  lib/libMLIRTilingInterface.a  lib/libMLIRXeGPUDialect.a  lib/libMLIRAffineUtils.a  lib/libMLIRIndexDialect.a  lib/libMLIRXeVMDialect.a  lib/libLLVMAsmPrinter.a  lib/libLLVMCodeGen.a  lib/libLLVMObjCARCOpts.a  lib/libLLVMScalarOpts.a  lib/libLLVMAggressiveInstCombine.a  lib/libLLVMInstCombine.a  lib/libLLVMTransformUtils.a  lib/libLLVMCGData.a  lib/libLLVMBitWriter.a  lib/libLLVMTarget.a  lib/libLLVMAnalysis.a  lib/libLLVMFrontendHLSL.a  lib/libLLVMProfileData.a  lib/libLLVMSymbolize.a  lib/libLLVMDebugInfoGSYM.a  lib/libLLVMDebugInfoPDB.a  lib/libLLVMDebugInfoMSF.a  lib/libLLVMDebugInfoBTF.a  lib/libLLVMCodeGenTypes.a  lib/libLLVMDebugInfoCodeView.a  lib/libLLVMDebugInfoDWARF.a  lib/libLLVMObject.a  lib/libLLVMMCParser.a  lib/libLLVMMC.a  lib/libLLVMIRReader.a  lib/libLLVMAsmParser.a  lib/libLLVMBitReader.a  lib/libLLVMTextAPI.a  lib/libLLVMDebugInfoDWARFLowLevel.a  lib/libMLIRMathTransforms.a  lib/libMLIRVectorDialect.a  lib/libMLIRIndexingMapOpInterface.a  lib/libMLIRVectorInterfaces.a  lib/libMLIRMaskableOpInterface.a  lib/libMLIRMaskingOpInterface.a  lib/libMLIRX86Dialect.a  lib/libMLIRLLVMCommonConversion.a  lib/libMLIROpenACCUtils.a  lib/libMLIROpenACCDialect.a  lib/libMLIRGPUDialect.a  lib/libMLIRDLTIDialect.a  lib/libMLIRMathDialect.a  lib/libMLIRSCFUtils.a  lib/libMLIRAffineAnalysis.a  lib/libMLIRSCFDialect.a  lib/libMLIRControlFlowDialect.a  lib/libMLIRTensorDialect.a  lib/libMLIRAffineDialect.a  lib/libMLIRMemRefDialect.a  lib/libMLIRArithUtils.a  lib/libMLIRAsmParser.a  lib/libMLIRComplexDialect.a  lib/libMLIRArithDialect.a  lib/libMLIRDialect.a  lib/libMLIRCastInterfaces.a  lib/libMLIRInferIntRangeCommon.a  lib/libMLIRShapedOpInterfaces.a  lib/libMLIRParallelCombiningOpInterface.a  lib/libMLIRMemorySlotUtils.a  lib/libMLIROpenMPDialect.a  lib/libMLIRFuncDialect.a  lib/libMLIRLLVMDialect.a  lib/libMLIRPtrMemorySpaceInterfaces.a  lib/libMLIROpenACCMPCommon.a  lib/libMLIRReconcileUnrealizedCasts.a  lib/libMLIRTransforms.a  lib/libMLIRUBDialect.a  lib/libMLIRTransformUtils.a  lib/libMLIRSubsetOpInterface.a  lib/libMLIRValueBoundsOpInterface.a  lib/libMLIRDestinationStyleOpInterface.a  lib/libMLIRRewrite.a  lib/libMLIRRewritePDL.a  lib/libMLIRPDLToPDLInterp.a  lib/libMLIRPDLInterpDialect.a  lib/libMLIRPDLDialect.a  lib/libMLIRPass.a  lib/libMLIRAnalysis.a  lib/libMLIRDialectUtils.a  lib/libMLIRPresburger.a  lib/libMLIRInferIntDivisibilityOpInterface.a  lib/libMLIRViewLikeInterface.a  lib/libMLIRDataLayoutInterfaces.a  lib/libMLIRInferStridedMetadataInterface.a  lib/libMLIRInferIntRangeInterface.a  lib/libMLIRInferTypeOpInterface.a  lib/libMLIRSideEffectInterfaces.a  lib/libMLIRLoopLikeInterface.a  lib/libMLIRControlFlowInterfaces.a  lib/libMLIRFunctionInterfaces.a  lib/libMLIRCallInterfaces.a  lib/libMLIRMemorySlotInterfaces.a  lib/libMLIRMemOpInterfaces.a  lib/libMLIRRuntimeVerifiableOpInterface.a  lib/libMLIRIR.a  lib/libMLIRSupport.a  lib/libLLVMCore.a  lib/libLLVMRemarks.a  lib/libLLVMBitstreamReader.a  lib/libLLVMBinaryFormat.a  lib/libLLVMTargetParser.a  lib/libLLVMSupport.a  lib/libLLVMDemangle.a  -lrt  -ldl  -lm  /usr/lib/x86_64-linux-gnu/libz.so && :
ld.lld: error: undefined symbol: Fortran::semantics::DerivedTypeSpec::VectorTypeAsFortran[abi:cxx11]() const
>>> referenced by formatting.cpp:680 (/home/gha/actions-runner/_work/llvm-project/llvm-project/flang/lib/Evaluate/formatting.cpp:680)
>>>               formatting.cpp.o:(Fortran::evaluate::DynamicType::AsFortran[abi:cxx11]() const) in archive lib/libFortranEvaluate.a
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
bin/fir-opt (Likely Already Failing) This test is already failing at the base commit. 
FAILED: bin/fir-opt
: && /opt/llvm/bin/clang++ -gmlt -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror -Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wc++98-compat-extra-semi -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -Wno-pass-failed -Wmisleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -Wno-deprecated-copy -Wno-string-conversion -Wno-ctad-maybe-unsupported -Wno-unused-command-line-argument -Wstring-conversion           -Wcovered-switch-default -Wno-nested-anon-types -O3 -DNDEBUG -no-pie -fuse-ld=lld -Wl,--color-diagnostics    -Wl,--gc-sections tools/flang/tools/fir-opt/CMakeFiles/fir-opt.dir/fir-opt.cpp.o -o bin/fir-opt  -Wl,-rpath,"\$ORIGIN/../lib:"  lib/libCUFAttrs.a  lib/libCUFDialect.a  lib/libFIRDialect.a  lib/libFIRSupport.a  lib/libFIRTransforms.a  lib/libFIRCodeGen.a  lib/libFIRCodeGenDialect.a  lib/libHLFIRDialect.a  lib/libHLFIRTransforms.a  lib/libFIROpenACCSupport.a  lib/libFIROpenACCTransforms.a  lib/libFIROpenMPSupport.a  lib/libFlangOpenMPTransforms.a  lib/libFIRAnalysis.a  lib/libMIFDialect.a  lib/libflangPasses.a  lib/libFIRTestAnalysis.a  lib/libFIRTestOpenACCInterfaces.a  lib/libMLIROpenACCTestPasses.a  lib/libMLIRTestIR.a  lib/libMLIRAffineAnalysis.a  lib/libMLIRAffineDialect.a  lib/libMLIRAffineTransforms.a  lib/libMLIRAffineTransformOps.a  lib/libMLIRAffineUtils.a  lib/libMLIRAMDGPUDialect.a  lib/libMLIRAMDGPUTransforms.a  lib/libMLIRAMDGPUUtils.a  lib/libMLIRArithDialect.a  lib/libMLIRArithValueBoundsOpInterfaceImpl.a  lib/libMLIRArithTransforms.a  lib/libMLIRArithUtils.a  lib/libMLIRArmNeonDialect.a  lib/libMLIRArmNeonTransforms.a  lib/libMLIRArmNeonVectorTransformOps.a  lib/libMLIRArmSMEDialect.a  lib/libMLIRArmSMETransforms.a  lib/libMLIRArmSVEDialect.a  lib/libMLIRArmSVETransforms.a  lib/libMLIRArmSVEVectorTransformOps.a  lib/libMLIRAsyncDialect.a  lib/libMLIRAsyncTransforms.a  lib/libMLIRBufferizationDialect.a  lib/libMLIRBufferizationPipelines.a  lib/libMLIRBufferizationTransformOps.a  lib/libMLIRBufferizationTransforms.a  lib/libMLIRComplexDialect.a  lib/libMLIRControlFlowDialect.a  lib/libMLIRControlFlowTransforms.a  lib/libMLIRDLTITransformOps.a  lib/libMLIRDLTIDialect.a  lib/libMLIREmitCDialect.a  lib/libMLIREmitCTransforms.a  lib/libMLIRFuncDialect.a  lib/libMLIRFuncTransforms.a  lib/libMLIRFuncTransformOps.a  lib/libMLIRFuncUtils.a  lib/libMLIRGPUDialect.a  lib/libMLIRGPUTransforms.a  lib/libMLIRGPUTransformOps.a  lib/libMLIRGPUPipelines.a  lib/libMLIRGPUUtils.a  lib/libMLIRIndexDialect.a  lib/libMLIRIRDL.a  lib/libMLIRLinalgDialect.a  lib/libMLIRLinalgTransformOps.a  lib/libMLIRLinalgTransforms.a  lib/libMLIRLinalgUtils.a  lib/libMLIRLLVMIRTransforms.a  lib/libMLIRLLVMDialect.a  lib/libMLIRNVVMDialect.a  lib/libMLIRROCDLDialect.a  lib/libMLIRVCIXDialect.a  lib/libMLIRXeVMDialect.a  lib/libMLIRMathDialect.a  lib/libMLIRMathTransforms.a  lib/libMLIRMemRefDialect.a  lib/libMLIRMemRefTransformOps.a  lib/libMLIRMemRefTransforms.a  lib/libMLIRMemRefUtils.a  lib/libMLIRShardDialect.a  lib/libMLIRShardTransforms.a  lib/libMLIRMLProgramDialect.a  lib/libMLIRMLProgramTransforms.a  lib/libMLIRMPIDialect.a  lib/libMLIRNVGPUDialect.a  lib/libMLIRNVGPUUtils.a  lib/libMLIRNVGPUTransformOps.a  lib/libMLIRNVGPUTransforms.a  lib/libMLIROpenACCAnalysis.a  lib/libMLIROpenACCDialect.a  lib/libMLIROpenACCUtils.a  lib/libMLIROpenACCTransforms.a  lib/libMLIROpenMPDialect.a  lib/libMLIROpenMPTransforms.a  lib/libMLIROpenMPUtils.a  lib/libMLIRPDLDialect.a  lib/libMLIRPDLInterpDialect.a  lib/libMLIRPtrMemorySpaceInterfaces.a  lib/libMLIRPtrDialect.a  lib/libMLIRQuantDialect.a  lib/libMLIRQuantTransforms.a  lib/libMLIRQuantUtils.a  lib/libMLIRSCFDialect.a  lib/libMLIRSCFTransformOps.a  lib/libMLIRSCFTransforms.a  lib/libMLIRSCFUtils.a  lib/libMLIRShapeDialect.a  lib/libMLIRShapeOpsTransforms.a  lib/libMLIRSMT.a  lib/libMLIRSparseTensorDialect.a  lib/libMLIRSparseTensorPipelines.a  lib/libMLIRSparseTensorTransformOps.a  lib/libMLIRSparseTensorTransforms.a  lib/libMLIRSparseTensorUtils.a  lib/libMLIRSPIRVDialect.a  lib/libMLIRSPIRVModuleCombiner.a  lib/libMLIRSPIRVConversion.a  lib/libMLIRSPIRVTransforms.a  lib/libMLIRSPIRVUtils.a  lib/libMLIRTensorDialect.a  lib/libMLIRTensorInferTypeOpInterfaceImpl.a  lib/libMLIRTensorTilingInterfaceImpl.a  lib/libMLIRTensorTransforms.a  lib/libMLIRTensorTransformOps.a  lib/libMLIRTensorUtils.a  lib/libMLIRTosaDialect.a  lib/libMLIRTosaShardingInterfaceImpl.a  lib/libMLIRTosaTransforms.a  lib/libMLIRTransformDebugExtension.a  lib/libMLIRTransformDialect.a  lib/libMLIRTransformDialectIRDLExtension.a  lib/libMLIRTransformLoopExtension.a  lib/libMLIRTransformPDLExtension.a  lib/libMLIRTransformSMTExtension.a  lib/libMLIRTransformDialectTransforms.a  lib/libMLIRTransformTuneExtension.a  lib/libMLIRTransformDialectUtils.a  lib/libMLIRUBDialect.a  lib/libMLIRVectorDialect.a  lib/libMLIRVectorTransforms.a  lib/libMLIRVectorTransformOps.a  lib/libMLIRVectorUtils.a  lib/libMLIRWasmSSADialect.a  lib/libMLIRX86Dialect.a  lib/libMLIRX86Transforms.a  lib/libMLIRX86TransformOps.a  lib/libMLIRX86Utils.a  lib/libMLIRXeGPUDialect.a  lib/libMLIRXeGPUTransforms.a  lib/libMLIRXeGPUUtils.a  lib/libMLIRXeGPUTransformOps.a  lib/libMLIRSPIRVTarget.a  lib/libMLIRTargetLLVMIRTransforms.a  lib/libMLIRNVVMTarget.a  lib/libMLIRROCDLTarget.a  lib/libMLIRXeVMTarget.a  lib/libMLIRTestDynDialect.a  lib/libMLIRTosaTestPasses.a  lib/libMLIRXeGPUTestPasses.a  lib/libMLIRBufferizationShardingExtensions.a  lib/libMLIRBufferizationAllExtensions.a  lib/libMLIRFuncInlinerExtension.a  lib/libMLIRFuncShardingExtensions.a  lib/libMLIRFuncAllExtensions.a  lib/libMLIRTensorShardingExtensions.a  lib/libMLIRTensorAllExtensions.a  lib/libMLIRIR.a  lib/libMLIRLLVMDialect.a  lib/libMLIRPass.a  lib/libMLIRFuncToLLVM.a  lib/libMLIRTransforms.a  lib/libMLIRAffineToStandard.a  lib/libMLIRAnalysis.a  lib/libMLIRSCFToControlFlow.a  lib/libMLIRParser.a  lib/libMLIRSupport.a  lib/libMLIRVectorToLLVM.a  lib/libMLIROptLib.a  lib/libHLFIRTransforms.a  lib/libFIROpenACCTransforms.a  lib/libFIROpenACCAnalysis.a  lib/libFlangOpenMPTransforms.a  lib/libFortranUtils.a  lib/libFIRTransforms.a  lib/libFIRCodeGen.a  lib/libFIROpenMPSupport.a  lib/libMLIRTestAnalysis.a  lib/libFIROpenACCSupport.a  lib/libFIRCodeGenDialect.a  lib/libFIRBuilder.a  lib/libFIRAnalysis.a  lib/libCUFDialect.a  lib/libFIRSupport.a  lib/libMLIROpenACCToLLVMIRTranslation.a  lib/libMLIROpenMPToLLVMIRTranslation.a  lib/libMLIRRegisterAllDialects.a  lib/libMLIRRegisterAllExtensions.a  lib/libMLIRComplexToROCDLLibraryCalls.a  lib/libMLIRMathToFuncs.a  lib/libMLIRArithToAMDGPU.a  lib/libMLIRArithToAPFloat.a  lib/libMLIRMathToAPFloat.a  lib/libMLIRArithAndMathToAPFloatUtils.a  lib/libMLIRArithToArmSME.a  lib/libMLIRArmNeon2dToIntr.a  lib/libMLIRArmSMEToSCF.a  lib/libMLIRArmSMEToLLVM.a  lib/libMLIRBufferizationToMemRef.a  lib/libMLIRComplexToSPIRV.a  lib/libMLIRControlFlowToSCF.a  lib/libMLIRControlFlowToSPIRV.a  lib/libMLIRConvertToEmitC.a  lib/libMLIRArithToEmitC.a  lib/libMLIRFuncToEmitC.a  lib/libMLIRGPUToSPIRV.a  lib/libMLIRLinalgToStandard.a  lib/libMLIRMathToEmitC.a  lib/libMLIRMathToSPIRV.a  lib/libMLIRMemRefToEmitC.a  lib/libMLIRShardToMPI.a  lib/libMLIRMPIToLLVM.a  lib/libMLIROpenACCToSCF.a  lib/libMLIRPtrToLLVM.a  lib/libMLIRSCFToEmitC.a  lib/libMLIRSCFToGPU.a  lib/libMLIRSCFToOpenMP.a  lib/libMLIRSCFToSPIRV.a  lib/libMLIRIndexToSPIRV.a  lib/libMLIRMemRefToSPIRV.a  lib/libMLIRShapeToStandard.a  lib/libMLIRSPIRVToLLVM.a  lib/libMLIRTensorToLinalg.a  lib/libMLIRTensorToSPIRV.a  lib/libMLIRArithToSPIRV.a  lib/libMLIRFuncToSPIRV.a  lib/libMLIRTosaToArith.a  lib/libMLIRTosaToLinalg.a  lib/libMLIRTosaToMLProgram.a  lib/libMLIRTosaToSCF.a  lib/libMLIRTosaToTensor.a  lib/libMLIRVectorToAMX.a  lib/libMLIRVectorToArmSME.a  lib/libMLIRVectorToSPIRV.a  lib/libMLIRUBToSPIRV.a  lib/libMLIRVectorToXeGPU.a  lib/libMLIRVectorToGPU.a  lib/libMIFDialect.a  lib/libHLFIRDialect.a  lib/libFIRDialect.a  lib/libCUFAttrs.a  lib/libMLIRBuiltinToLLVMIRTranslation.a  lib/libMLIROpenMPToLLVM.a  lib/libMLIRLLVMToLLVMIRTranslation.a  lib/libMLIRBufferizationAllExtensions.a  lib/libMLIRBufferizationShardingExtensions.a  lib/libMLIRFuncAllExtensions.a  lib/libMLIRFuncInlinerExtension.a  lib/libMLIRFuncShardingExtensions.a  lib/libMLIRTensorAllExtensions.a  lib/libMLIRTensorShardingExtensions.a  lib/libFIRDialectSupport.a  lib/libMLIRAffineTransformOps.a  lib/libMLIRAMDGPUTransforms.a  lib/libMLIRArithValueBoundsOpInterfaceImpl.a  lib/libMLIRArmNeonVectorTransformOps.a  lib/libMLIRArmSMETransforms.a  lib/libMLIRArmSMEDialect.a  lib/libMLIRArmSVEVectorTransformOps.a  lib/libMLIRAsyncTransforms.a  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lib/libLLVMDebugInfoDWARF.a  lib/libLLVMDebugInfoPDB.a  lib/libLLVMDebugInfoCodeView.a  lib/libLLVMDebugInfoMSF.a  lib/libLLVMDebugInfoBTF.a  lib/libLLVMFrontendHLSL.a  lib/libLLVMObject.a  lib/libLLVMMCParser.a  lib/libLLVMMC.a  lib/libLLVMDebugInfoDWARFLowLevel.a  lib/libLLVMIRReader.a  lib/libLLVMBitReader.a  lib/libLLVMTextAPI.a  lib/libLLVMFrontendOpenACC.a  lib/libLLVMFrontendDirective.a  -lquadmath  lib/libMLIROpenACCAnalysis.a  lib/libMLIROpenACCUtils.a  lib/libMLIROpenACCDialect.a  lib/libMLIRTestDialect.a  lib/libMLIRControlFlowTransforms.a  lib/libMLIRLinalgTransforms.a  lib/libMLIRShardTransforms.a  lib/libMLIRTosaShardingInterfaceImpl.a  lib/libMLIRTosaDialect.a  lib/libMLIRQuantUtils.a  lib/libMLIRQuantDialect.a  lib/libMLIRSCFTransforms.a  lib/libMLIRIndexDialect.a  lib/libMLIRTensorTransforms.a  lib/libMLIRTensorTilingInterfaceImpl.a  lib/libMLIRLinalgUtils.a  lib/libMLIRTensorUtils.a  lib/libMLIRTilingInterface.a  lib/libMLIRVectorToSCF.a  lib/libMLIRVectorTransforms.a  lib/libMLIRGPUUtils.a  lib/libMLIRLinalgDialect.a  lib/libMLIRMemRefTransforms.a  lib/libMLIRAffineTransforms.a  lib/libMLIRSCFUtils.a  lib/libMLIRAffineUtils.a  lib/libMLIRArithTransforms.a  lib/libMLIRBufferizationTransforms.a  lib/libMLIRBufferizationDialect.a  lib/libMLIRSparseTensorDialect.a  lib/libMLIRFuncTransforms.a  lib/libMLIRShardingInterface.a  lib/libMLIRShardDialect.a  lib/libMLIRNVGPUDialect.a  lib/libMLIRMemRefUtils.a  lib/libMLIRVectorUtils.a  lib/libMLIRAffineAnalysis.a  lib/libMLIRSCFDialect.a  lib/libMLIRControlFlowDialect.a  lib/libMLIRMemorySlotUtils.a  lib/libMLIRVectorDialect.a  lib/libMLIRIndexingMapOpInterface.a  lib/libMLIRMaskableOpInterface.a  lib/libMLIRMaskingOpInterface.a  lib/libMLIRVectorInterfaces.a  lib/libMLIRNVVMDialect.a  lib/libMLIRGPUDialect.a  lib/libMLIRDLTIDialect.a  lib/libMLIRMathDialect.a  lib/libMLIROpenMPDialect.a  lib/libMLIRFuncDialect.a  lib/libMLIRLLVMDialect.a  lib/libMLIROpenACCMPCommon.a  lib/libLLVMAsmParser.a  lib/libMLIRPtrDialect.a  lib/libMLIRPtrMemorySpaceInterfaces.a  lib/libMLIRTensorDialect.a  lib/libMLIRAffineDialect.a  lib/libMLIRMemRefDialect.a  lib/libMLIRArithUtils.a  lib/libMLIRComplexDialect.a  lib/libMLIRArithDialect.a  lib/libMLIRCastInterfaces.a  lib/libMLIRInferIntRangeCommon.a  lib/libMLIRShapedOpInterfaces.a  lib/libMLIRParallelCombiningOpInterface.a  lib/libMLIRTransforms.a  lib/libMLIRUBDialect.a  lib/libMLIRMemorySlotInterfaces.a  lib/libMLIRMemOpInterfaces.a  lib/libMLIRRuntimeVerifiableOpInterface.a  lib/libMLIRDerivedAttributeOpInterface.a  lib/libMLIRReduce.a  lib/libMLIRTransformUtils.a  lib/libMLIRSubsetOpInterface.a  lib/libMLIRValueBoundsOpInterface.a  lib/libMLIRDestinationStyleOpInterface.a  lib/libMLIRRewrite.a  lib/libMLIRRewritePDL.a  lib/libMLIRPDLToPDLInterp.a  lib/libMLIRPDLInterpDialect.a  lib/libMLIRPDLDialect.a  lib/libMLIRIRDL.a  lib/libMLIRDialect.a  lib/libMLIRParser.a  lib/libMLIRBytecodeReader.a  lib/libMLIRAsmParser.a  lib/libMLIRBytecodeWriter.a  lib/libMLIRBytecodeOpInterface.a  lib/libMLIRDebug.a  lib/libMLIRObservers.a  lib/libMLIRPluginsLib.a  lib/libMLIRPass.a  lib/libMLIRAnalysis.a  lib/libMLIRDialectUtils.a  lib/libMLIRInferTypeOpInterface.a  lib/libMLIRSideEffectInterfaces.a  lib/libMLIRPresburger.a  lib/libMLIRInferIntDivisibilityOpInterface.a  lib/libMLIRLoopLikeInterface.a  lib/libMLIRFunctionInterfaces.a  lib/libMLIRCallInterfaces.a  lib/libMLIRControlFlowInterfaces.a  lib/libMLIRViewLikeInterface.a  lib/libMLIRDataLayoutInterfaces.a  lib/libMLIRInferStridedMetadataInterface.a  lib/libMLIRInferIntRangeInterface.a  lib/libMLIRRemarkStreamer.a  lib/libMLIRIR.a  lib/libMLIRSupport.a  lib/libLLVMCore.a  lib/libLLVMRemarks.a  lib/libLLVMBinaryFormat.a  lib/libLLVMTargetParser.a  lib/libLLVMBitstreamReader.a  lib/libLLVMSupport.a  -lrt  -ldl  -lm  /usr/lib/x86_64-linux-gnu/libz.so  lib/libLLVMDemangle.a && :
ld.lld: error: undefined symbol: Fortran::semantics::DerivedTypeSpec::VectorTypeAsFortran[abi:cxx11]() const
>>> referenced by formatting.cpp:680 (/home/gha/actions-runner/_work/llvm-project/llvm-project/flang/lib/Evaluate/formatting.cpp:680)
>>>               formatting.cpp.o:(Fortran::evaluate::DynamicType::AsFortran[abi:cxx11]() const) in archive lib/libFortranEvaluate.a
clang++: error: linker command failed with exit code 1 (use -v to see invocation)

If these failures are unrelated to your changes (for example tests are broken or flaky at HEAD), please open an issue at https://github.com/llvm/llvm-project/issues and add the infrastructure label.

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github-actions Bot commented May 19, 2026 •
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🪟 Windows x64 Test Results

  • 134936 tests passed
  • 3303 tests skipped

✅ The build succeeded and all tests passed.

petar-avramovic
petar-avramovic reviewed May 20, 2026
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need to regenerate some failing ll tests

Comment thread llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp Outdated
Comment thread llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp Outdated
Comment thread llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
@saxlungs saxlungs force-pushed the users/saxlungs/true16-gisel-16bit-extloads branch from b0cac7e to 3534ffb Compare May 20, 2026 20:18
@saxlungs saxlungs force-pushed the users/saxlungs/true16-gisel-16bit-extloads-combiner branch from 529ab5a to 0489434 Compare May 20, 2026 20:18
@saxlungs saxlungs force-pushed the users/saxlungs/true16-gisel-16bit-extloads branch from 3534ffb to 8b918ae Compare May 20, 2026 21:24
@saxlungs saxlungs force-pushed the users/saxlungs/true16-gisel-16bit-extloads-combiner branch from 0489434 to 2756993 Compare May 20, 2026 21:24
@kosarev kosarev self-requested a review May 21, 2026 12:43
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@petar-avramovic petar-avramovic petar-avramovic approved these changes

@kosarev kosarev Awaiting requested review from kosarev

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