course projects for "Open Source Prototype Systems and Applications (2026 Spring)" in NSYSU, Taiwan
| Projects | Descriptions |
|---|---|
| Project 1 | RV32I Single-Cycle Baseline Processor |
| Project 2-1 | RV32I Pipelined Processor with Cache Subsystem |
| Project 2-2 | Gem5: Histogram Binning Workload |
| Labs | Descriptions |
|---|---|
| W11 Lab1 | Two-Core Cache Coherence Prototype System |
| W11 Lab2 | Gem5: Producer-Consumer Multithreading Workload |
